New blog draft on the TESTFRAME debacle

[Kurt Roeckx]

On Sun, Jan 08, 2017 at 06:35:58AM -0800, Hal Murray wrote:
> 
> >> Using the term PLL.
> > But that's how the code is organized.  In the absence of a PLL it doesn't
> > slew.  Or am I missing something here? 
> 
> (at least) One of us is confused.
> 
> The text from the blog:
> > There are two kinds of NTP hosts; one uses a kernel facility known as the
> > "PLL" for doing fine adjustments to the tick speed of the system clock, the
> > other kind does not.
> 
> That just seems wrong.  There is no PLL involved with slewing a clock.

Since there seems to be confusion about whta a PLL is, I will try
to explain. In very short, a Phase Lock Loop will compare the
phase of 2 systems, and use the difference of that to change the
frequency of one of them so that the phases (and frequency) match.

It consist of at least 3 things:
- A phase (or time) comparison
- An oscilator whose frequency you can change
- A feedback loop

There might also be a filter in it.

I guess the important thing here is that the frequency of your
local oscilator changes, to match the one from the master clock.

What I wouldn't call a PLL is that you calcualte a time
difference, temporary change the frequency to work away that
offset, and then return to the old frequency. It should instead
permantly change the frequency, until the next time you calculate
the difference in time, and possibly change the frequency again.


Kurt