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<h3>
Matt Selsky pushed to branch master
at <a href="https://gitlab.com/NTPsec/ntpsec">NTPsec / ntpsec</a>
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<h4>
Commits:
</h4>
<ul>
<li>
<strong><a href="https://gitlab.com/NTPsec/ntpsec/commit/0a50fbc8a1ee5586065b01ca02b9eda411033dbe">0a50fbc8</a></strong>
<div>
<span>by Paul Theodoropoulos</span>
<i>at 2018-10-14T02:31:20Z</i>
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<pre class="commit-message" style="white-space: pre-wrap; margin: 0;">NIST guideline conformance, grammar, TOY chip...
Mentions of "time-of-year chip" are extremely rare, and
usually found in very old documents (from the VMS era). However,
the term was used in a fairly recent Ubuntu manual, so it seemed
best to include mention of this past usage, rather than wholesale
replacement with RTC.
</pre>
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<h4>1 changed file:</h4>
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<li class="file-stats">
<a href="#6f97681e3b8ddb7ec5a562b099d500466df613b3">
docs/clock.txt
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<h4>Changes:</h4>
<li id="6f97681e3b8ddb7ec5a562b099d500466df613b3">
<a href="https://gitlab.com/NTPsec/ntpsec/commit/0a50fbc8a1ee5586065b01ca02b9eda411033dbe#6f97681e3b8ddb7ec5a562b099d500466df613b3"><strong>docs/clock.txt</strong></a>
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<td class="line_content match " style="padding-left: 0.5em; padding-right: 0.5em; color: rgba(0,0,0,0.3);" bgcolor="#fafafa">@@ -30,10 +30,11 @@ one timer: _hold_.</td>
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<pre style="margin: 0;"> <span id="LC30" class="line" lang="plaintext">[[panic]]</span>
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<pre style="margin: 0;"> <span id="LC31" class="line" lang="plaintext">== Panic Threshold ==</span>
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<pre style="margin: 0;"> <span id="LC32" class="line" lang="plaintext"></span>
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<pre style="margin: 0;">-<span id="LC33" class="line" lang="plaintext">Most computers today incorporate a time-of-year (TOY) chip to maintain</span>
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<pre style="margin: 0;">+<span id="LC33" class="line" lang="plaintext">Most computers today incorporate a real-time-clock (RTC) chip (sometimes</span>
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<pre style="margin: 0;">+<span id="LC34" class="line" lang="plaintext">referred to as a "time-of-year" (TOY) chip in the past) to maintain</span>
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<pre style="margin: 0;"> <span id="LC35" class="line" lang="plaintext">the time when the power is off. When the computer is restarted, the chip</span>
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<pre style="margin: 0;">-<span id="LC35" class="line" lang="plaintext">is used to initialize the operating system time. In case there is no <span class="idiff left right">TOY</span></span>
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<pre style="margin: 0;">-<span id="LC36" class="line" lang="plaintext">chip or the <span class="idiff left right">TOY</span> time is different from NTP time by more than the panic</span>
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<pre style="margin: 0;">+<span id="LC36" class="line" lang="plaintext">is used to initialize the operating system time. In case there is no <span class="idiff left right">RTC</span></span>
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<pre style="margin: 0;">+<span id="LC37" class="line" lang="plaintext">chip or the <span class="idiff left right">RTC</span> time is different from NTP time by more than the panic</span>
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<pre style="margin: 0;"> <span id="LC38" class="line" lang="plaintext">threshold, the daemon assumes something must be terribly wrong, so</span>
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<pre style="margin: 0;"> <span id="LC39" class="line" lang="plaintext">exits with a message to the system operator to set the time manually.</span>
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<pre style="margin: 0;"> <span id="LC40" class="line" lang="plaintext">With the +-g+ option on the command line, the daemon sets the clock to</span>
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<td class="line_content match " style="padding-left: 0.5em; padding-right: 0.5em; color: rgba(0,0,0,0.3);" bgcolor="#fafafa">@@ -71,10 +72,10 @@ leap second, but the radio itself did not respond until it</td>
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<pre style="margin: 0;"> <span id="LC72" class="line" lang="plaintext">resynchronized some minutes later. Further details are on the</span>
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<pre style="margin: 0;"> <span id="LC73" class="line" lang="plaintext">link:leap.html[Leap Second Processing] page.</span>
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<pre style="margin: 0;"> <span id="LC74" class="line" lang="plaintext"></span>
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<pre style="margin: 0;">-<span id="LC74" class="line" lang="plaintext">In some applications the clock can never be set backward, even i<span class="idiff left right">t</span></span>
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<pre style="margin: 0;">+<span id="LC75" class="line" lang="plaintext">In some applications the clock can never be set backward, even i<span class="idiff left right">f it is</span></span>
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<pre style="margin: 0;"> <span id="LC76" class="line" lang="plaintext">accidentally set forward a week by some evil means. The issues should be</span>
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<pre style="margin: 0;"> <span id="LC77" class="line" lang="plaintext">carefully considered before using these options. The slew rate is fixed</span>
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<pre style="margin: 0;">-<span id="LC77" class="line" lang="plaintext">at 500 parts-per-million (<span class="idiff left right">PPM</span>) by the Unix kernel. As a result, the</span>
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<pre style="margin: 0;">+<span id="LC78" class="line" lang="plaintext">at 500 parts-per-million (<span class="idiff left right">ppm</span>) by the Unix kernel. As a result, the</span>
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<pre style="margin: 0;"> <span id="LC79" class="line" lang="plaintext">clock can take 33 minutes to amortize each second the clock is outside</span>
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<pre style="margin: 0;"> <span id="LC80" class="line" lang="plaintext">the acceptable range. During this interval the clock will not be</span>
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<pre style="margin: 0;"> <span id="LC81" class="line" lang="plaintext">consistent with any other network clock and the system cannot be used</span>
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<td class="line_content match " style="padding-left: 0.5em; padding-right: 0.5em; color: rgba(0,0,0,0.3);" bgcolor="#fafafa">@@ -85,7 +86,7 @@ time.</td>
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<pre style="margin: 0;"> <span id="LC86" class="line" lang="plaintext">== Hold Timer ==</span>
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<pre style="margin: 0;"> <span id="LC87" class="line" lang="plaintext"></span>
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<pre style="margin: 0;"> <span id="LC88" class="line" lang="plaintext">When the daemon is started after a considerable downtime, it could be</span>
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<pre style="margin: 0;">-<span id="LC88" class="line" lang="plaintext">th<span class="idiff left right">e TOY</span> chip clock has drifted significantly from NTP time. This can</span>
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<pre style="margin: 0;">+<span id="LC89" class="line" lang="plaintext">th<span class="idiff left right">at the RTC</span> chip clock has drifted significantly from NTP time. This can</span>
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<pre style="margin: 0;"> <span id="LC90" class="line" lang="plaintext">cause a transient at system startup. In the past, this has produced a</span>
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<pre style="margin: 0;"> <span id="LC91" class="line" lang="plaintext">phase transient and resulted in a frequency surge that could take some</span>
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<pre style="margin: 0;"> <span id="LC92" class="line" lang="plaintext">time, even hours, to subside. When the highest accuracy is required,</span>
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<td class="line_content match " style="padding-left: 0.5em; padding-right: 0.5em; color: rgba(0,0,0,0.3);" bgcolor="#fafafa">@@ -98,7 +99,7 @@ second intervals until reaching zero. However, the hold timer is forced</td>
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<pre style="margin: 0;"> <span id="LC99" class="line" lang="plaintext">to zero if the residual clock offset is less than 0.5 ms. When nonzero,</span>
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<pre style="margin: 0;"> <span id="LC100" class="line" lang="plaintext">the discipline algorithm uses a small time constant (equivalent to a</span>
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<pre style="margin: 0;"> <span id="LC101" class="line" lang="plaintext">poll exponent of 2), but does not adjust the frequency. Assuming that</span>
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<pre style="margin: 0;">-<span id="LC101" class="line" lang="plaintext">the frequency has been set to within 1 <span class="idiff left right">PPM</span>, either from the frequency</span>
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<pre style="margin: 0;">+<span id="LC102" class="line" lang="plaintext">the frequency has been set to within 1 <span class="idiff left right">ppm</span>, either from the frequency</span>
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<pre style="margin: 0;"> <span id="LC103" class="line" lang="plaintext">file or by the training interval described later, the clock is set to</span>
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<pre style="margin: 0;"> <span id="LC104" class="line" lang="plaintext">within 0.5 ms in less than 300 s.</span>
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<pre style="margin: 0;"> <span id="LC105" class="line" lang="plaintext"></span>
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<td class="line_content match " style="padding-left: 0.5em; padding-right: 0.5em; color: rgba(0,0,0,0.3);" bgcolor="#fafafa">@@ -109,14 +110,14 @@ The state machine operates in one of four nonoverlapping intervals.</td>
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<pre style="margin: 0;"> <span id="LC110" class="line" lang="plaintext"></span>
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<pre style="margin: 0;"> <span id="LC111" class="line" lang="plaintext">Training interval::</span>
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<pre style="margin: 0;"> <span id="LC112" class="line" lang="plaintext"> This interval is used at startup when the frequency file is not</span>
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<pre style="margin: 0;">-<span id="LC112" class="line" lang="plaintext"> present<span class="idiff left right"> at startup</span>. It begins when the first update is received by the</span>
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<pre style="margin: 0;">+<span id="LC113" class="line" lang="plaintext"> present. It begins when the first update is received by the</span>
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<pre style="margin: 0;"> <span id="LC114" class="line" lang="plaintext"> discipline algorithm and ends when an update is received following the</span>
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<pre style="margin: 0;"> <span id="LC115" class="line" lang="plaintext"> stepout threshold. The clock phase is steered to the offset presented</span>
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<pre style="margin: 0;"> <span id="LC116" class="line" lang="plaintext"> at the beginning of the interval, but without affecting the frequency.</span>
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<pre style="margin: 0;">-<span id="LC116" class="line" lang="plaintext"> During th<span class="idiff left right">e</span> interval further updates are ignored. At the end of the</span>
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<pre style="margin: 0;">+<span id="LC117" class="line" lang="plaintext"> During th<span class="idiff left right">is</span> interval further updates are ignored. At the end of the</span>
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<pre style="margin: 0;"> <span id="LC118" class="line" lang="plaintext"> interval the frequency is calculated as the phase change during the</span>
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<pre style="margin: 0;"> <span id="LC119" class="line" lang="plaintext"> interval divided by the length of the interval. This generally results</span>
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<pre style="margin: 0;">-<span id="LC119" class="line" lang="plaintext"> in a frequency error <span class="idiff left right">less than 0.5 PPM. Note that,</span> if the intrinsic</span>
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<pre style="margin: 0;">+<span id="LC120" class="line" lang="plaintext"> in a frequency error <span class="idiff left right">of less than 0.5 ppm. Note that</span> if the intrinsic</span>
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<pre style="margin: 0;"> <span id="LC121" class="line" lang="plaintext"> oscillator frequency error is large, the offset will in general have</span>
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<pre style="margin: 0;"> <span id="LC122" class="line" lang="plaintext"> significant error. This is corrected during the subsequent startup</span>
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<pre style="margin: 0;"> <span id="LC123" class="line" lang="plaintext"> interval.</span>
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